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  1. Startseite
  2. Semiconductors
  3. Digital ICs
  4. eMMC Memory
  5. ATP eMMC Memory

AF010GEC5A-2004IX

ATP
ATP AF010GEC5A-2004IX

Abbildung kann vom Original abweichen

Description: pSLC eMMC 10GByte 5.1 I-Temp Hersteller: ATP Matchcode: EMMC10 Rutronik No.: ICEMMC1176 VPE: 1000 MOQ: 1000 Package: BGA153 Verpackung: REEL
Alternativen finden Datenblatt Einfügen in Projektliste Muster

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Artikelart
pSLC
Dichte
10G Byte
Betriebs Temperatur min.
-40 °C
Betriebs Temperatur max.
85 °C
Gehäuse
BGA153
Gehäusebreite
11.5x13 mm
U(ccq)
1,8/3,3 V
U(cc)
2,7-3,6 V
Automotive
NO
Verpackung
REEL
RoHS Status
RoHS-conform
Geschwindigkeit
200MHz MHz
ECCN
EAR99
Zolltarifnummer
85423219000
Land
Taiwan
Lieferzeit beim Hersteller
101 Wochen

The ATP industrial e.MMC is an advanced storage solution that integrates NAND flash memory, a sophisticated flash controller, and a fast MultiMedia Card (MMC) interface in the same package. By incorporating these components in an integrated package, ATP e.MMC manages all background operations internally, freeing the host from handling low-level flash operations for faster and more efficient processing.

Smaller than a typical postage stamp, ATP e.MMC comes in a 153-ball fine pitch ball grid array (FBGA package). The tiny footprint makes it perfectly suitable for embedded systems with space constraints but require rugged endurance, reliability and durability in harsh environments.

ATP e.MMC is built to meet the tough demands of industrial applications. As a soldered-down solution, it is secure against constant vibrations. Its industrial temperature rating means that severe scenarios from freezing cold -40°C to blistering hot 105°C will not cause adverse impact on the device or the data in it.

Compliant with the latest JEDEC e.MMC 5.1 Standard (JESD84-B51), ATP e.MMC features Command Queuing and Cache Barrier to enhance random read/write performance; High Speed 400 (HS400) DDR Mode for a bandwidth of up to 400 MB/s; and field firmware update (FFU). Enhanced Strobe in HS400 Mode facilitates faster synchronization between the host and the e.MMC device; and, Secure Write Protection ensures that only trusted entities can protect or unprotect the e.MMC device.

It is backward compatible with previous versions (v4.41/v4.5/v5.0), supporting features such as power-off notifications, packed commands, cache, boot or replay protected memory block (RPMB) partitions, high priority interrupt (HPI), and hardware (HW) reset.

Features:

  • AEC-Q100 Grade 2 (-40°C~105°C) compliant*
  • AEC-Q100 Grade 3 (-40°C~85°C) compliant*
  • Extra-high endurance: 2-3X higher than standard e.MMC*
  • Complies with JEDEC e.MMC v5.1 Standard (JESD84-B51)
  • 153-ball FBGA (RoHS compliant, "green package")
  • LDPC ECC engine*

* May vary by product and project support

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Letzte Bestellmöglichkeit beim Hersteller: 30.06.2025
14,82 $
14.820,00 $

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